YLN08-0812C2, A X-Band 8-12 GHz Low Noise Amplifier

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A X-band 8-12 GHz Low Noise Amplifier

$70.57

– Part No.: YLN08-0812C2
– Manufacturer: YFEEN
– Operation frequency range: 8 GHz to 12 GHz
– Noise figure < 1.2dB, Gain: 28dB, Gain flatness: +/-0.5dB
– Output P1dB>13dBm, Input VSWR<1.5dB, Output VSWR<1.5dB
– Power supply: 59mA@4V, Die size 2.0 x 1.1 x 0.1mm

Quantity	Discount (%)	Price
1 - 24	—	$70.57
25 - 99	7.14 %	$65.53
100 - 499	15.57 %	$59.58
500 - 999	18.78 %	$57.32
1,000 - 1,999	21.68 %	$55.27
2,000+	24.57 %	$53.23

YLN01-0812C2 is a high-performance GaAs Low Noise Amplifier MMIC designed to operate in the X-band.

The YLN01-0812C2 has an ultra-low noise figure of 1.2dB, and with a minimum 28dB of gain, the on chip matching provides better than 15dB input and output return loss. It can be used in Radar, Telecommunications, and Instrumentation.

This chip is fabricated using PHEMT process technology.

Feature

Operation frequency range: 8 GHz to 12 GHz
Noise figure < 1.2dB
Gain: 28dB
Gain flatness: +/-0.5dB
Output P_1dB>13dBm
Input VSWR<1.5dB
Output VSWR<1.5dB
Power supply：59mA@4V
Die size 2.0mm x 1.1mm

APPLICATION

Radar
Telecommunications
Instrumentation

MAXIMUM VALUES

T_amb = + 25℃

Symbol	Parameter	Test conditions	Min.	Max.	Unit
VD	Drain voltage		0	+ 5	V
ID	Drain current			60	mA
P_IN	RF input power			+ 10	dBm
T_amb	Ambient temperature		– 55	+ 125	°C
T_j	Junction temperature			+ 150	°C
T_stg	Storage temperature		– 65	+ 150	°C

Operation of this device outside the parameter ranges given above may cause permanent damage.

ELECTRONICAL CHARACTERISTICS

T_amb=+25°C，VD=4V

Symbol	Parameter	Test conditions	Min.	Typ.	Max.	Unit
RFIN	Input frequency		8		12	GHz
Performances of bare die
VD	Drain voltage			+ 4		V
ID	Drain current		54	56	59	mA
G	Gain		27.5	28.5	28.8	dB
NF	Noise figure		0.8	1.1	1.2	dB
P1dB	1dB compression point output power		13	13.5	14	dBm
VSWR_IN	Input VSWR	0.3nH gold wire		1.4		dB
VSWR_OUT	Output VSWR	0.3nH gold wire		1.3		dB

Caution: This device is a high-performance RF component and can be damaged by inappropriate handling. Standard ESD precautions should be followed.

Measurements

S-Parameter

Test Conditions: 25°C, VDD = 4V, ID = 56mA, 0.3nH gold wire

Noise Figure

Test Conditions: 25°C, VDD = 4V, ID = 56mA

P1dB Curve

Test Conditions: 25°C, VDD = 4V, ID = 56mA

Information

APPLICATION SCHEMATIC

To prevent instability of the customer design, it is highly recommended to place small chip capacitors as near as possible to the YLN08-0812C2, here 100pF recommended as placed in the demonstration board. Additionally, a 10nF capacitor can be added on a drain connection to insure low frequency decoupling.

YLN08-0812C2 circuit block diagram

PIN CONFIGURATION

Bare die information

Datasheet & Order Code

Document Download

Datasheet Download

ORDERING INFORMATION

Type	Pkg.	Version	Description
YLN08-0812C2	Bare die	C1	Die size: 2000 x 1100 µm (due to saw,there may be public errand of ±15 µm) Thickness: 0.1 mm